Rapidus, Tenstorrent join forces to build semiconductor IP for edge

Rapidus, Tenstorrent join forces to build semiconductor IP for edge

Rapidus Corporation, a Japanese company specializing in advanced logic semiconductors, has partnered with Tenstorrent Incorporation, a provider of embedded hardware optimized for artificial intelligence applications. The collaboration is for both companies to build semiconductor IP for edge computing environments based on 2nm manufacturing process technology.

As part of the partnership, Tenstorrent aims to leverage Rapidus’ expertise in semiconductor development to serve the growing demand of various industries.

To support this nanometer scale logic semiconductor technology, Rapidus has started constructing an Innovative Integration for Manufacturing (IIM) facility in Japan, in a bid to produce advanced semiconductors at the 2nm technology node. Additionally, Rapidus has collaborated with Albany Nanotech Complex in the USA and IBM to develop the technologies needed for producing 2nm logic semiconductor.

According to Rapidus, the production line is anticipated to start in April 2025. The company also intends to obtain Extreme Ultraviolet (EUV) lithography technology to have access to all the necessary tools and methods required for semiconductor production. The mass production of 2nm logic semiconductor is expected to commence in 2027, the company says.

“I am very pleased to be working with Tenstorrent,” says Atsuyoshi Koike, president and chief executive officer of Rapidus Inc. “We are both unique startup companies, and I am confident that this collaboration will lead to major innovations based on AI.”

Tenstorrent is a fabless AI chip design and software firm that specializes in AI processors and servers, utilizing the open-standard RISC-V instruction set architecture. The company’s Ascalon architecture, based on RISC-V, is designed to provide customers with the flexibility to customize their silicon for specific use cases.

In comparison to GPUs, Tenstorrent processors consist of a grid of cores known as Tensix cores, capable of handling both small and large tensor computations. Each of these Tensix cores is equipped with 5 RISC processors, an array math unit for tensor operations, a SIMD unit for vector operations, and hardware for accelerating network packet operations.

“We have tremendous momentum with our customers in the Asia Pacific region right now, and I am proud that we can start talking about all the things we are doing in Japan,” adds David Bennett, chief customer officer of Tenstorrent. “We are excited about the bold and aggressive moves that Japan is making to take advantage of its legacy of excellence in semiconductor technology and its incredible engineering talent base.”

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