Bluespec’s newest RISC-V chip adds customization capabilities for edge workloads
Bluespec, a RISC-V tools and silicon IP provider, has introduced a processor design based on the open standard RISC-V instruction set architecture that will allow more customization based on the workloads customers want to run on edge systems.
According to the company, the MCUX processor expands upon the existing lineup of RISC-V processors for microcontroller units (MCUs), offering enhanced flexibility for developers to incorporate customizable instructions and integrate accelerators into FPGA and ASIC designs.
Bluespec believes that the integration of extensions and accelerators will enable their customers to optimize their hardware solutions for specific applications. To provide a cost-effective option, the company has developed the MCUX processor in a compact form factor, resulting in reduced resource consumption. Moreover, Bluespec has released an application note to help customers who wish to implement custom instructions on the MCUX processor.
“Developers can add advanced hardware extensions to accelerate specific workloads to run even more efficiently while keeping resources very low,” says Charlie Hauck, CEO at Bluespec. “Another major advantage of our MCUX processor is that there are no licensing restrictions so developers can work with any FPGA vendor.”
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Bluespec provides the MCUX processor without licensing restrictions, enabling customers to collaborate with their preferred FPGA vendor. This level of flexibility facilitates the development of application-specific hardware platforms.
“It’s clear that developers want more design flexibility and are eager to avoid vendor lock-in, which are two reasons why RISC-V has been so successful to date,” says Calista Redmond, CEO of RISC-V International. “Bluespec’s new MCUX RISC-V processor is meeting this demand to give companies more freedom to innovate.”
The RISC-V instruction set architecture gained popularity due to its modular design, offering developers the flexibility to select a base integer instruction set in 32-bit, 64-bit, or 128-bit formats, along with standard unprivileged extensions like machine mode, supervisor mode, and user mode.
Privilege models can also be based on specific application requirements. Features such as vector extensions, bit manipulation, double-precision floating-point operations, and 16-bit compressed instructions are available in these privilege models.
According to Bluespec, the MCUX processor’s high level of customization offers developers enhanced flexibility to meet the distinct requirements of various applications, particularly in mission-critical scenarios within the defense industry. This adaptability enables faster execution of critical operations and reduces memory access, resulting in enhanced overall efficiency.
Article Topics
ASIC | Bluespec | chip | edge applications | FPGA | processor | RISC-V | RISC-V International
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